This invention relates to a solid-state image pickup apparatus and an image pickup method for a solid-state image pickup apparatus, and more particularly to correction of fixed pattern noise for a solid-state image pickup apparatus and an image pickup method for a solid-state image pickup apparatus.
An image pickup apparatus which uses a solid-state image pickup element such as a CMOS image sensor is known already and is still developed and investigated in order to achieve further increase in number of pixels, speed in image pickup, a wide dynamic range and further reduction of noise.
However, if the processing frequency is raised simply in order to process a greater number of pixels at a higher speed, then this gives rises to a problem of degradation of an analog circuit system in terms of noise, power consumption and accuracy. Therefore, such a technique is used as to read out, from an image pickup element array in which solid-state image pickup elements are arranged in rows and columns, image signals at a time from the columns or transfer such image signals in parallel along a plurality of lines in a horizontal direction so that the signal reading out process is performed at a reduced speed.
However, a dispersion in a production process or the like gives rise to a problem that it causes a dispersion in inputting and outputting characteristics in such parallel reading out as described above, resulting in generation of fixed pattern noise including a striped defect on an output image. Japanese Patent Laid-Open No. 2000-261730 (hereinafter referred to as Patent Document 1) discloses an apparatus wherein such fixed pattern noise is stored as a digital value and the stored value is used to correct a pickup image signal to obtain an image free from vertical stripe noise.
However, in order to accurately recognize fixed pattern noise in the form of a vertical stripe, a large invalid area is required in addition to a valid image area. This arises from the fact that to add and average a number of pickup image signals as great as possible within a period within which a fixed pattern noise component is obtained is advantageous in improvement of the accuracy of the value of fixed pattern noise. This, however, acts negatively in high speed image pickup.
Further, from a characteristic of digital arithmetic operation, a limit to correction by a gradation upon A/D conversion is provided by a quantization error, an arithmetic operation rounding error and so forth. Particularly in a system which has an A/D converter of a low gradation, this correction limit matters and sometimes makes the noise cancellation insufficient.
Further, although it is preferable to use a number of pickup image signals as great as possible for addition and averaging in order to improve the accuracy of a value to be stored as fixed pattern noise, this increases the value of the added average and increases the required memory capacity, which is not efficient.
Furthermore, sometimes an image of a wide dynamic range is used or a plurality of gain patterns are included in one screen in order to improve the S/N ratio. In this instance, the image or the screen sometimes includes a plurality of different fixed noise patterns. Also a correction process applicable to such a plurality of fixed pattern noise patterns as just described is demanded.